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NXP Semiconductors /LPC1102_04 /SYSCON /PRESETCTRL

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Interpret as PRESETCTRL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (RESETS_THE_SPI0_PERI)SSP0_RST_N 0RESERVED

SSP0_RST_N=RESETS_THE_SPI0_PERI

Description

Peripheral reset control

Fields

SSP0_RST_N

SPI0 reset control

0 (RESETS_THE_SPI0_PERI): Resets the SPI0 peripheral.

1 (SPI0_RESET_DE_ASSERT): SPI0 reset de-asserted.
RESERVED

Reserved

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data